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LT1567 1.4nV/Hz 180MHz Filter Building Block
FEATURES

DESCRIPTIO
Single-Ended to Differential Conversion Low Noise: 1.4nV/Hz 20VRMS Total Wideband Noise in Filter with 2MHz fC Dynamic Range: 104dB SNR at 5V Total Supply Voltage: 2.7V to 12V Rail-to-Rail Outputs DC Accurate: Op Amp VOS 0.5mV (Typ) Trimmed Bandwidth for Accurate Filters No External Clock Required MSOP-8 Surface Mount Package
The LT(R)1567 is an analog building block optimized for very low noise high frequency filter applications. It contains two wideband rail-to-rail operational amplifiers, one of them internally configured as a unity-gain inverter. With the addition of a few passive components, the LT1567 becomes a flexible second order filter section with cutoff frequency (fC) up to 5MHz, ideal for antialiasing or for channel filtering in high speed data communications systems. A spreadsheet-based design tool is available at www.linear.com for designing lowpass and bandpass filters using the LT1567. In addition to low noise and high speed, the LT1567 features single-ended to differential conversion for direct driving of high speed differential input A/D converters. The LT1567 operates from a total power supply voltage of 2.7V to 12V and supports signal-to-noise ratios above 100dB. The LT1567 is available in an 8-lead MSOP package.
, LTC, LT and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
APPLICATIO S

Low Noise, High Speed Filters to 5MHz Low Noise Differential Circuits Communication Channel or Roofing Filters Antialias or Reconstruction Filtering Video Signal Processing Single-Ended to Differential Conversion
TYPICAL APPLICATIO
2MHz 3-Pole Antialias Filter with Single-Ended to Differential Conversion
R2 536 R1 536 VIN C1 270pF 0.1F 3 4 0.1F V- 96dB DIFFERENTIAL SNR WITH 3V TOTAL SUPPLY GAIN = R2 2.5MHz R1 f-3dB R3 = R4 = R5, C1 = C2 = C3 1 ;f 2.5MHz f-3dB = 1.82 = 2R2C2 4R3C3 -3dB R3 147 C2 270pF 1 2 LT1567 8 7 6 5 C3 270pF R5 147
1567 TA01
V+ 0.1F
12 6
R4 147 +AIN ADC -AIN LTC1420
0
GAIN (dB)
-6 -12 -18 -24 NOTE: 6dB GAIN RESULTS FROM -30 SINGLE-ENDED TO DIFFERENTIAL CONVERSION -36 100 1M FREQUENCY (Hz)
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Frequency Response
10M
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LT1567
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW OAOUT OAIN BYPASS V- 1 2 3 4 8 7 6 5 V+ INVOUT INVIN DC BIAS
Total Supply Voltage (V+ to V -) ............................ 12.6V Input Current (Note 2) ........................................ 25mA Operating Temperature Range (Note 3) LT1567C ..............................................-40C to 85C LT1567I ...............................................-40C to 85C Specified Temperature Range (Note 4) LT1567C ..............................................-40C to 85C LT1567I ...............................................-40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LT1567CMS8 LT1567IMS8 MS8 PART MARKING LTWH LTWJ
MS8 PACKAGE 8-LEAD PLASTIC MSOP
TJMAX = 150C, JA = 200C/W
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The denotes the specifications that apply over the full operating temperature range (Note 4), otherwise specifications and typical values are at TA = 25C. VS = 2.5V, RL = 1K, VOUT = 0 on both amplifiers unless otherwise noted.
PARAMETER Total Supply Voltage Supply Current VS = 1.5V VS = 2.5V VS = 5V VS = 1.5V, RL = 1k VS = 2.5V, RL = 1k VS = 2.5V, RL=100 VS = 5V, RL = 1k VS = 1.5V, RL = 1k VS = 2.5V, RL = 1k VS = 2.5V, RL=100 VS = 5V, RL = 1k VS = 1.5V, RL = 1k VS = 2.5V, RL = 1k VS = 2.5V, RL = 100 (LT1567I Only, Note 5) VS = 5V, RL = 1k VS = 1.5V, RL = 1k VS = 2.5V, RL = 1k VS = 2.5V, RL = 100 (LT1567I Only, Note 5) VS = 5V, RL = 1k VS = 1.5V, CMRR 40dB (Note 6) VS = 5V, CMRR 40dB (Note 6) VS = 1.5V, DC BIAS = -0.25V to 0.25V VS = 5V, DC BIAS = -2.5V to 2.5V VS = 1.5V to 5V, DC BIAS = 0V

CONDITIONS
MIN 2.7
TYP 8.5 9 11
MAX 12 15 16 19
UNITS V mA mA mA V V V V V V V V V V V V V V V V
OA Output Positive Voltage Swing
1.30 2.20 1.90 4.70 -1.30 -2.20 -2.00 -4.70 1.30 2.20 1.80 4.60 -1.30 -2.20 -1.80 -4.50 -0.5 -3.8 80 65 80
1.45 2.45 2.25 4.90 -1.45 -2.45 -2.30 -4.90 1.40 2.50 2.00 4.80 -1.40 -2.40 -2.00 -4.80 0.5 3.5 90 100 0.5 5 3 9
OA Output Negative Voltage Swing
INV Output Positive Voltage Swing
INV Output Negative Voltage Swing
Common Mode Input Voltage Range (DC BIAS, Pin 5) (See Pin Functions) DC Common Mode Rejection Ratio (CMRR) DC Power Supply Rejection Ratio (PSRR) OA Input Offset Voltage INV Output Offset Voltage
2
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V V dB dB dB mV mV
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LT1567
ELECTRICAL CHARACTERISTICS
The denotes the specifications that apply over the full operating temperature range (Note 4), otherwise specifications and typical values are at TA = 25C. VS = 2.5V, RL = 1K, VOUT = 0 on both amplifiers unless otherwise noted.
PARAMETER OA Input Bias Current DC BIAS Input Bias Current OA DC Open-Loop Gain VS = 1.5V, RL = 1k, VO = -1V to 1V VS = 2.5V, RL = 1k, VO= -2V to 2V VS = 2.5V, RL = 100, VO = -1.5V to 1.5V VS = 5V, RL = 1k, VO = -4V to 4V VS = 1.5V, RL = 1k, VIN = -1V to 1V VS = 2.5V, RL = 1k, VIN = -2V to 2V VS = 2.5V, RL = 100, VIN = -1.5V to 1.5V VS = 5V, RL = 1k, VIN = -4V to 4V VS = 2.5V, RL = 1k, VIN = -2V to 2V Measured at 2MHz, VS = 1.5V Measured at 2MHz, VS = 2.5V Measured at 2MHz, VS = 5V -3dB Measured at 2MHz VS = 5V VS = 5V f = 100kHz f = 100kHz fC = 2MHz, BW = 4MHz (Note 8) fC = 5MHz, BW = 10MHz (Note 8) f = 1MHz, fC = 2MHz, VOUT = 1VRMS f = 2.5MHz, fC = 5MHz, VOUT = 1VRMS

CONDITIONS

MIN
TYP 3 6
MAX 10 15
UNITS A A V/mV V/mV V/mV V/mV
7.5 10 1.2 10 0.97 0.97 0.97 0.97 450 100 110 120 0.96
55 60 7.0 80 1.04 1.04 1.04 1.04 600 180 185 190 85 1.0 55 90 1.4 1.0 20 30 -88 -70 1.05 750
INV DC Gain
V/V V/V V/V V/V MHz MHz MHz MHz V/V V/s V/s nV/Hz pA/Hz VRMS VRMS dB dB mA
INV DC Input Resistance OA Gain Bandwidth Product
INV Bandwidth INV AC Gain OA Slew Rate INV Slew Rate OA Input Voltage Noise Density (Note 7) OA Input Current Noise Density Wideband Output Noise for a Second Order Filter (Figure 1) Total Harmonic Distortion (THD) for a Second Order Filter (Figure 1) Output Short-Circuit Current (Note 9) OA Output Impedance INV Output Impedance
8
50 0.03 0.7
f = 100kHz, OA Connected as Unity-Gain Inverter f = 100kHz
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs of each op amp are protected by back-to-back diodes and diodes to each supply. If either input exceeds the supply or the differential input voltage exceeds 1.4V, the input current should be limited to less than 25mA. Note 3: The LT1567C and LT1567I are guaranteed functional over the operating temperature range -40C to 85C. Note 4: The LT1567C is guaranteed to meet specified performance from 0C to 70C. The LT1567C is designed, characterized and expected to meet specified performance from -40C to 85C but not tested or QA sampled at these temperatures. The LT1567I is guaranteed to meet specified performance from - 40C to 85C.
Note 5: With INVIN pin driven to 2V. Note 6: This parameter is not 100% tested. Note 7: The input referred voltage noise density of the unity gain inverter is 5.6nV/Hz which includes the noise of the gain setting resistors. Note 8: For fC = 2MHz, C1 = C2 = 180pF, R1 = R2 = 604, R3 = 316 and for fC = 5MHz, C1 = C2 = 180pF, R1 = R2 = 232, R1 = 130. BW is the bandwidth of the noise measurement (Figure 1 circuit). Note 9: Under direct short circuit conditions, with TA < 25C the output current is reduced.
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LT1567 TYPICAL PERFOR A CE CHARACTERISTICS
OA Open-Loop Gain and Phase vs Frequency
70 60 50 40
GAIN (dB)
GAIN (dB)
30 20 10 0 -10 -20 -30 0.1 10 1 FREQUENCY (MHz) 100
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Closed-Loop Gain and Phase of OA and INV vs Frequency (AV = -1)
10 8 6 4 182 VS = 5V TA = 25C 180 GAIN OA OUT 178 GAIN INV OUT 176 10 8 6 4
GAIN (dB)
GAIN (dB)
2 0 -2 -4 -6 -8 -10 0.1 1 10 FREQUENCY (MHz) 100
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OA Gain Bandwidth Product and Phase Margin vs Temperature
275 PHASE MARGIN VS = 5V 65
POWER SUPPLY REJECTION (dB)
250
GAIN BANDWIDTH (MHz)
45
PHASE MARGIN (DEG)
70 60 50 40 30 20 10 NEGATIVE SUPPLY VS = 5V AV = -10 RF = 1k RG = 100 RL = 1k 0.1 1 0.01 FREQUENCY (MHz) 10
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POWER SUPPLY REJECTION (dB)
225
PHASE MARGIN VS = 1.5V GBW PRODUCT VS = 5V GBW PRODUCT VS = 1.5V
200
175
150 -55 -35 -15
-35 5 25 45 65 85 105 125 TEMPERATURE (C)
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4
UW
PHASE INV OUT 5
OA Open-Loop Gain and Phase vs Frequency
70 60 50 40
PHASE (DEG)
150 VS = 5V TA = 25C 120 90 PHASE 60 30 GAIN 0 -30 -60 -90 -120 -150
150 VS = 1.5V TA = 25C 120 90 PHASE 60
PHASE (DEG)
30 20 10 0 -10 -20 -30 0.1 1 10 FREQUENCY (MHz) 100
1567 G02
30 GAIN 0 -30 -60 -90
-120 -150
Closed-Loop Gain and Phase of OA and INV vs Frequency (AV = -1)
182 GAIN OA OUT GAIN 180 INV OUT 178 176
PHASE (DEG)
PHASE (DEG)
174 172 PHASE OA OUT 170 168 166 164 162
2 0 -2 -4 -6 -8 VS = 1.5V TA = 25C 1 10 FREQUENCY (MHz) 100
1567 G15
174 172 PHASE INV OUT PHASE OA OUT 170 168 166 164 162
-10 0.1
PSRR of OA vs Frequency
90 80
90 80 70 60 50 40 30 20 10
PSRR of OA or INV vs Frequency
POSITIVE SUPPLY
25
POSITIVE SUPPLY
NEGATIVE SUPPLY
-15
0 0.001
0 0.001
VS = 5V AV = -1 RF = RG = 1k RL = 1k 0.01 0.1 1 FREQUENCY (MHz) 10
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LT1567 TYPICAL PERFOR A CE CHARACTERISTICS
Output Impedance vs Frequency
100 VS = 5V TA = 25C OA AV = -10
SLEW RATE (V/s)
10 OUTPUT IMPEDANCE ()
1
INVERTER OA AV = -1
40 VS = 1.5V 30
OVERSHOOT (%)
0.1
0.01
0.001 100k
1M 10M FREQUENCY (Hz)
Output Overshoot vs Series Resistor and Capacitive Load
40 35 30 OVERSHOOT (%) 25 20 15 10 5 0 10 100 CAPACITIVE LOAD (pF) 1000
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3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0.1 1 10 FREQUENCY (kHz) 100
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CURRENT NOISE DENSITY (pA/Hz)
VOLTAGE NOISE DENSITY (nV/Hz)
VS = 1.5V AV = -1
RS = 10 RL =
RS = 20 RL =
RS = RL = 50
Input Bias Current of OA vs Common Mode Voltage
8 7 INPUT BIAS CURRENT (A) SUPPLY CURRENT (mA) 6 5 4 3 2 1 0 0 4 3 COMMON MODE VOLTAGE (V)
1567 G12
VS = 5V
1
UW
100M
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OA Rising Slew Rate vs Temperature
60 AV = -1 RF = RG = 1k RL = 1k 30 VS = 5V 25 20 15 10 5 20 -55 -35 -15 0 5 25 45 65 85 105 125 TEMPERATURE (C)
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Output Overshoot vs Series Resistor and Capacitive Load
VS = 2.5V AV = -1 RS = 10 RL =
50 VS = 2.5V
RS = 20 RL =
RL = RS = 50 10 100 CAPACITIVE LOAD (pF) 1000
1567 G08
Input Voltage Noise Density of OA vs Frequency
4.5 4.0 TA = 25C 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5
Input Current Noise Density of OA vs Frequency
TA = 25C
0 0.1
1 10 FREQUENCY (kHz)
100
1567 G11
Supply Current vs Supply Voltage
20
15
10
5
2
5
0
0
2 6 8 4 TOTAL SUPPLY VOLTAGE (V)
10
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LT1567
PI FU CTIO S
OAOUT (Pin 1): Output of the Uncommitted Op Amp (OA). As with most wideband op amps, it is important to avoid connecting heavy capacitive loads (above about 10pF) directly to this output. Such loads will impair AC stability and should be isolated from the output through series resistance. OAIN (Pin 2): Inverting or "-" Input of the Uncommitted Op Amp (OA) in the LT1567. The noninverting or "+" input of this amplifier is shared with that of the INV amplifier and accessed via the DC BIAS and BYPASS pins. The OA amplifier is optimized for minimal wideband noise. BYPASS (Pin 3): AC Ground Bypass. A decoupling capacitor, typically 0.1F, from this pin to a printed circuit ground plane must be used. Use the shortest possible wiring. Power Supply Pins (Pins 4, 8): The V - and V+ pins should be bypassed with 0.1F capacitors to an adequate analog ground plane using the shortest possible wiring. Electrically clean supplies and a low impedance ground are important to obtain the wide dynamic range and bandwidth available from the LT1567. Low noise linear power supplies are recommended. Switching supplies require special care because of the inevitable risk of their switching noise coupling into the signal path, reducing dynamic range. DC BIAS (Pin 5): DC Biasing Input. Sets the DC voltage at the noninverting inputs of the two internal amplifiers; designed for use as a DC reference, not a signal input.The DC BIAS input includes a small series resistor, both to balance DC offsets in the presence of input bias currents and also to suppress the "Q" factor of possible parasitic high frequency resonant circuits introduced by wiring inductance. The reference voltage at the noninverting inputs of the two amplifiers is decoupled for very high frequencies with a small internal capacitor to the chip substrate, nominally 7pF. An external capacitor, typically 0.1F, to a nearby ground plane must be added at Pin 3 (BYPASS) for a clean wideband DC reference biasing voltage. INVIN (Pin 6): Unity-Gain Inverter Input. The "inverter" (INV) amplifier in the LT1567 is connected to internal resistors (nominally 600 each) to form a closed-loop amplifier with a wideband voltage gain of nominally -1. This amplifier is similar to the uncommitted op amp (OA) but is optimized for high frequency linearity. INVOUT (Pin 7): Output of the INV or "Inverter" Amplifier, with a Nominal Gain of -1 from the INVIN Pin. As with most wideband op amps, it is important to avoid connecting heavy capacitive loads (above about 10pF) directly to this output. Such loads will impair AC stability and should be isolated from the output through series resistance.
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BLOCK DIAGRA W
+
OAOUT 1 OA
+ 8V
-
OAIN 2
+
INV 7 INVOUT 600 600 6 INVIN
-
BYPASS 3 7pF V- 4
150 5 DC BIAS
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LT1567
APPLICATIO S I FOR ATIO
Functional Description The LT1567 contains two low noise rail-to-rail output, wideband operational amplifiers, one of them connected internally as a unity-gain inverter. These two amplifiers can form a second order multiple feedback filter configuration (Figure 1) for megahertz signal frequencies, with exceptionally low total noise. The amplifier in the dedicated inverter (INV) is optimized for better high frequency linearity while the uncommitted operational amplifier (OA) is optimized for lower input noise voltage,
1 R2 R1 VIN C2 0.1F 3 5 150 V+ 8 0.1F 4 7pF V- 0.1F R3 C1 2 LT1567 600 600 6
V+
fO =
1 2R2R3 C2
GAIN (dB)
R2 R3 Q= GAIN + 1 TRANSFER FUNCTION H(s) =
(2fO)2 (2fO) s + Q s + (2fO)2
2
Figure 1. 2nd Order Lowpass Filter and Gain Response for fC = 1MHz (Butterworth: C1 = C2 = 390pF, R1 = R2 = 576, R3 = 280 Chebyshev: C1 = C2 = 390pF, R1 = R2 = 453, R3 = 174)
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addressing the different sensitivities to these effects when used as a filter section. This combination produces a low noise filter with better distortion performance than would be possible with identical amplifiers. LT1567 Free Design Software A spreadsheet-based design tool is available at www.linear.com for designing lowpass and bandpass filters using the LT1567.
VOUT- DESIGN EQUATIONS: R2 GAIN = 1 AND fC 1MHz GAIN = R1 1 1000 * fC 1 BUTTERWORTH R2 = 4.44 * C1 * fC R2 R3 = 2 R1 = R2, C1 = C2, C1 CHEBYSHEV 0.25dB RIPPLE R2 = 1 5.65 * C1 * fC R2 R3 = 2.62
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(
)
fC IS THE FILTER'S CUTOFF FREQUENCY
-
7 VOUT+
+
V-
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Gain vs Frequency
3 0 -3 -6 -9 -12 -15 -18 -21 -24 -27 -30 100k 1M FREQUENCY (Hz) 10M
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CHEBYSHEV BUTTERWORTH
GAIN IS MEASURED TO EITHER OUTPUT ALONE. IF OUTPUT USED DIFFERENTIALLY, VOUT+ - VOUT- = 2x VIN
LT1567
APPLICATIO S I FOR ATIO
The simple-to-use spreadsheet requires the user to define the desired corner (or center) frequency, the passband gain and a capacitor value for a choice of second or third order Chebyshev or Butterworth lowpass or second order bandpass filters. The spreadsheet outputs the required external standard component values and provides a circuit diagram. Signal Ground Both operational amplifiers within the LT1567 are designed for inverting operation (constant common mode
1 C2 R1 VIN R2 0.1F 3 5 150 V+ 8 0.1F 7pF C1 R3 2 LT1567
6 600
V+
25 20 15
GAIN (dB)
10 5 0 -5 -10 -15 50k 500k FREQUENCY (Hz) 5M
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GAIN IS MEASURED TO EITHER OUTPUT ALONE. IF OUTPUT USED DIFFERENTIALLY, VOUT+ - VOUT- = 2x VIN
Figure 2. 2nd Order Bandpass Filter and Gain Response for fC = 500kHz, Gain = 10 (C1 = C2 = 1000pF, R2 = R3 = 1.05k, R1 = 105)
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input) and they share a single reference node on the chip. Two pins permit access to this node: DC BIAS and BYPASS. For a clean reference over a wide bandwidth, the normal procedure is to connect DC BIAS to a DC potential or ground and BYPASS to a decoupling capacitor that returns to a ground plane. Differential Output Feature The multiple feedback filter section of Figure 1 inherently includes two outputs of opposite signal polarity: a DC inverting output from the OA (Pin 1) and a DC noninverting
VOUT- 600 DESIGN EQUATIONS FOR fCENTER 1MHz fCENTER IS THE FILTER'S CENTER FREQUENCY 7 VOUT+ MAXIMUM fCENTER = 5MHz/GAIN GN IS GAIN AT fCENTER = R3/R1, R2 = R3, C1 = C2 fCENTER = V- 4 0.1F C1 fCENTER GN + 1 -3dB BANDWIDTH = 2 * * R2 * C1 GN + 1
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GN + 1 GN + 1 R3 = 2500 * fC 2 * C1 * fCENTER
V-
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Gain vs Frequency
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LT1567
APPLICATIO S I FOR ATIO
output from the INV block (Pin 7). These two outputs maintain equal gain and 180 phase shift over a wide frequency range. This feature permits choosing the signal polarity in single ended applications, and also performs single ended to differential conversion. The latter property is useful as an antialiasing filter to drive standard monolithic A/D converters having differential inputs, as illustrated on the first page of this data sheet. Dealing with High Source Impedances The voltage VIN in Figure 1, on the left side of R1, is the signal voltage that the filter sees. If a voltage source with significant internal impedance drives the VIN node in Figure 1, then the filter input VIN may differ from the source's open-circuit output, and the difference can be complex, because the filter presents a complex impedance to VIN. A rule of thumb is that a source impedance is negligibly "low" if it is much smaller than R1 at frequencies of interest. Otherwise, the source impedance (resistive or reactive) effectively adds to R1 and may change the signal frequency response compared to that with a low source impedance. If the source is resistive and predictable, then it may be possible to design for it by reducing R1. Unpredictable or nonresistive source impedances that are not much less than R1 should be buffered. Construction and Instrumentation Cautions Electrically clean construction is important in applications seeking the full dynamic range and bandwidth of the LT1567. Using the shortest possible wiring or printedcircuit paths will minimize parasitic capacitance and inductance. High quality supply bypass capacitors of 0.1F near the chip, connected to a ground plane, provide good decoupling from a clean, low inductance power source. But several inches of wire (i.e., a few microhenrys of inductance) from the power supplies, unless decoupled by substantial capacitance (10F) near the chip, can Low Noise Differential Circuits The LT1567 is an optimum analog building for designing single supply differential circuits to process low level signals. Figure 3 shows a single ended to differential amplifier driving a 1st order differential RC filter. The differential output of Figure 3 is a function of input (VIN) and the VREF voltage on Pin 5. (The range of the VREF voltage on Pin 5 in Figures 3, 4 and 5 is the common mode input voltage range parameter under Electrical Characteristics.)The graph of Figure 3 shows the differential signal-to-noise ratio for a gain of 2 and a gain of 10. Increasing the differential gain increases the differential signal-to-noise ratio. The equivalent input noise is equal to the output noise divided by the gain. For example, with a gain equal to 2 (R2 = R1 = 200) and a gain equal to 10 (R2 = 1k, R1 = 200), the equivalent input noise is 4.59nV/ Hz and 2.04nV/Hz respectively. The VREF voltage on Pin 5 can be set by a voltage divider or a reference voltage source. To maximize the unclipped LT1567 output swing, the DC output voltage should be set at V+/2. However, if VINDC (the input DC voltage) is within the range of VREF, then VREF can be equal to VINDC. The input signal can also be AC coupled to the input resistor, R1, and VREF set to the DC voltage of the circuit following the amplifier. For example, VREF might be set to 1.2V to bias the input of an I and Q modulator used in broadband communication systems.
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cause a high Q LC resonance in the hundreds of kHz in the chip's supplies or ground reference. This may impair filter performance at those frequencies. In stringent filter applications, a compact, carefully laid out printed circuit board with good ground plane makes a difference in both stopband rejection and distortion. Finally, equipment to measure filter performance can itself introduce distortion or noise. Checking for these limits with a wire in place of the filter is a prudent routine procedure.
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LT1567
APPLICATIO S I FOR ATIO
R1 VIN 1 LT1567 600 600 6 R2
0.1F 3 5
VREF
VOUT1 = - R2 * VIN + R2 + 1 * VREF R1 R1
VDIFF = VOUT2 - VOUT1 = 2 * R2 * (VIN - VREF) R1 fBW IS THE NOISE BANDWIDTH fBW =
Differential Output Signal-to-Noise Ratio (for a Sinewave Signal)
110 VDIFF GAIN = 2 R1 = R2 = 200 100
SIGNAL-TO-NOISE RATIO (dB)
90
80 V+ = 5V f-3dB = 2.55MHz fNBW = 4MHz 0.5 1 1.5 2 VDIFF (VRMS) 2.5 3
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Figure 3. A Single Ended to Differential Amplifier
+
-
2
150 V+ 8 0.1F
V+
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VOUT1 R C VDIFF
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7pF V- 4
7 VOUT2
R
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()
VOUT2 = -VOUT1 + 2 VREF f -3dB = 1 4 * R * C
1.57 4 * R * C
VDIFF GAIN = 10 R1 = 200 R2 = 1k
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LT1567
APPLICATIO S I FOR ATIO
Figure 4 shows an LT1567 single supply differential buffer driving a differential 1st order RC filter. The VREF voltage is subject to the common mode (DC BIAS) limits in the spec table. Within this constraint, VREF can be used to adjust the output common mode level, as noted in Figure 4. For example, in a single 5V power supply circuit, if the input common mode DC voltage is 1.1V and VREF is 1.8V, then the output common mode DC voltage is 2.5V. Figure 5 shows a low noise differential to single ended amplifier and 1st order lowpass filter. The input common mode rejection depends on the matching of resistors R1 and R3 and the LT1567 inverter gain tolerance (common mode rejection is at least 38dB up to 1MHz with 1% resistors and 5% inverter gain tolerance). The DC voltage at the amplifier's output (VOUT) is VREF.
VIN1 604 VIN2 1 LT1567 600 600 6 604 VOUT1 R
0.1F 3 5
VREF
V+ VOUT1 = -VIN2 + 2VREF VOUT2 = -VIN1 + 2VREF COMMON MODE VOUT IS 2VREF - (COMMON MODE VIN) VDIFF = VOUT2 - VOUT1 = VIN2 - VIN1 fBW IS THE NOISE BANDWIDTH f -3dB = fBW = 1 4 * R * C 1.57 4 * R * C
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+
-
2
150 V+ 8 0.1F
Figure 4. A Differential Buffer/Driver
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Output Drive The output of the LT1567 op amp (Pin 1) can typically provide at least 20mA. The minimum resistive load to ground that Pin 1 or Pin 7 can drive depends on the feedback resistor and the peak output voltage. For example, the differential driver circuit in Figure 4 is operating with a single 5V supply, VREF and VINDC are equal to 2.5V and the peak AC signal (VINAC) is 1V. If the outputs provide 1.66mA to the feedback resistors (1V/604), then 18.34mA is available to drive a resistive load. With the peak output voltage at 3.5V (2.5V DC plus 1V peak AC), the outputs can drive resistive loads of 191 or greater.
C VDIFF
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7pF V- 4
7 VOUT2
R
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LT1567
APPLICATIO S I FOR ATIO
VIN2 R3 = R1 C
R1 VIN1 LT1567
0.1F 3 5
VREF
WITH R3 AND R1 EQUAL, VOUT = VREF + R2 (VIN2 - VIN1) R1 GAIN FROM (VIN2 - VIN1) TO VOUT IS R2 R1 f -3dB = 1 2 * R2 * C
IF R1 = R3 = 604, THEN
NOISE AT VOUT = GAIN * V * fBW; fBW = 1.57 * f -3dB
Figure 5. A Differential to Single Ended Amplifier/Filter
+
-
2
U
R2 VOUT 1 6 600 600
W
UU
-
7
+
150 V+ 8 0.1F 4 7pF V-
1567 F05
V+
() ()
R2 604 1.21k 2.43k
GAIN 1 2 4
V, INPUT REFERRED NOISE (nV/Hz) 9.0 8.4 8.1
1567fa
13
LT1567
APPE DIX: OUTPUT OISE OF A OP A P I VERTI G A PLIFIER
R2 RS R1
+ -
VS
VOUT
RP
CS
1567 AP01
NOISE AT VOUT IN VRMS = VON IN V/Hz * fNBW fNBW = NOISE BANDWIDTH VON =
(
R2 + 1 R1 + RS
)
2
* VN2 +
(
R2 R1 + RS
)
2
* (VR12 + VSN2) + VR22 + (IN * R2)2
IF VSN AND RS = 0 THEN VON =
()
R2 + 1 R1
2
* VN2 + R2 R1
()
2
* VR12 + VR22 + (IN * R2)2
VON is the voltage noise density in V/Hz at the inverter's output. VN is the op amp's voltage noise density in V/Hz. IN is the op amp's current noise density in A/Hz. VSN is the voltage noise density of the input voltage source VS with source resistance RS. (If VSN is less than one-half the noise of resistor R1, then the calculation error when omitting VSN is less than 4.3%.) VR1 and VR2 is the voltage noise density of the thermal noise of resistors (R1 + RS) and R2 respectively. Resistor RS is typically smaller than R1 and is omitted from noise
calculations. The voltage noise density of the thermal noise of a resistor R is approximately 0.128xRnV/Hz at 25C. The RP resistor noise at the op amp's plus input is equal to (kT/CS) and is omitted from noise calculations. (If CS = 0.1F, the RP noise is 0.2VRMS at 25C, k = 1.38x 10-23 and T = 273C + 25C.) The noise bandwidth (fNBW) is greater than a circuit's -3dB bandwidth. (For a 1st, 2nd or 3rd order Butterworth filter, fNBW is 1.57x, 1.22x and 1.15x respectively the - 3dB bandwidth.)
Example: Calculate VON, the voltage noise density of an LT1567 op amp inverter for R1 = R2 = 604. With VN = 1.4nV/Hz and IN = 1pA/Hz.
VON =
()
604 + 1 604
2
* (1.4 *10-9)2 + 604 604
()
2
* (0.128 *10-9 * 604)2 + (0.128 * 10-9 * 604)2 + (10-12 * 604)2
VON = 5.29nV/Hz
14
W
U
UW
+
-
U
U
U
1567fa
LT1567
PACKAGE DESCRIPTIO
5.23 (.206) MIN
0.42 0.038 (.0165 .0015) TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254 (.010)
GAUGE PLANE
0.18 (.007) SEATING PLANE
0.22 - 0.38 (.009 - .015) TYP
0.127 0.076 (.005 .003)
MSOP (MS8) 0204
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
MS8 Package 8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 0.127 (.035 .005)
3.20 - 3.45 (.126 - .136)
0.65 (.0256) BSC
3.00 0.102 (.118 .004) (NOTE 3)
8
7 65
0.52 (.0205) REF
DETAIL "A" 0 - 6 TYP
4.90 0.152 (.193 .006)
3.00 0.102 (.118 .004) (NOTE 4)
0.53 0.152 (.021 .006)
DETAIL "A"
1
23
4
1.10 (.043) MAX
0.86 (.034) REF
0.65 (.0256) BSC
1567fa
15
LT1567
TYPICAL APPLICATIO U
A 3rd Order Chebyshev 2.5MHz Lowpass Filter
VOUT- 1 649 40.2 VIN 2200pF 220pF 0.1F 3 5 150 V+ 8 0.1F 4 7pF V- 0.1F 604 90.9 220pF 2 LT1567 600 600 6
10 0
GAIN (dB)
-10
-20
-30
-40 100k
GAIN IS MEASURED TO EITHER OUTPUT ALONE. IF OUTPUT USED DIFFERENTIALLY, VOUT+ - VOUT- = 2x VIN
RELATED PARTS
PART NUMBER LTC 1560-1 LTC1562/LTC1562-2
(R)
DESCRIPTION 1MHz/500kHz Continuous Time, Lowpass Elliptic Filter Universal 8th Order Active RC Filters
LTC1563-2/LTC1563-3 4th Order Active RC Lowpass Filters LTC1565-31 LTC1566-1 LT1568 650kHz Continuous Time, Linear Phase Lowpass Filter 2.3MHz Continuous Time Lowpass Filter Very Low Noise 4th Order Filter Building Block
LTC1569-6/LTC1569-7 Self Clocked, 10th Order Linear Phase Lowpass Filters
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
+
V+
- -
7 VOUT+
+
V-
1567 F06a
Gain Response
1M FREQUENCY (Hz)
10M
1567 F06b
COMMENTS fCUTOFF = 500kHz or 1MHz fCUTOFF(MAX) = 150kHz (LTC1562) fCUTOFF(MAX) = 300kHz (LTC1562-2) fCUTOFF(MAX) = 256kHz 7th Order, Differential Inputs and Outputs 7th Order, Differential Inputs and Outputs fCUTOFF Up to 10MHz, Differential VOUT fCLK/fCUTOFF = 64/1, fCUTOFF(MAX) = 64kHz (LTC1569-6) fCLK/fCUTOFF = 32/1, fCUTOFF(MAX) = 374kHz (LTC1569-7)
1567fa LT 0406 REV A * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 2001

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